个人简历

男，副教授，生于1972年10月31日，研究生学历，博士学位。2009年毕业于美国德克萨斯大学奥斯汀分校，获电子与计算机工程工学博士学位。现任成都信息工程学院通信学院副教授。

研究领域

嵌入式系统与物联网技术
人工智能与智能信息处理
通信集成电路与微电子系统
数模混合专用集成电路与系统

近期论文

A. Ramalingam, B. Zhang, A. Devgan, D. Z. Pan, “Sleep transistor sizing using timing criticality and temporal currents,” in Proc. Asia and South Pacific Design Automation Conference, 2005, pp. 1094 – 1097, Shanghai, China.
B. Zhang and M. Orshansky, “Symbolic simulation of the propagation and filtering of transient faulty pulses,” in Workshop on System Effects of Logic Soft Errors, 2005, Urbana Champion, IL.
B. Zhang, W.-S. Wang and M. Orshansky, “FASER: Fast analysis of soft error susceptibility for cell-based designs,” in Proc. International Symposium on Quality Electronic Design, 2006, pp. 755-760, San Jose, CA. (Best Paper Award最佳论文奖)
K. Constantinides, S. Plaza, J. Blome, B. Zhang, V. Bertacco, S. Mahlke, T. Austin and M. Orshansky, “BulletProof: a defect-tolerant CMP switch architecture,” in Proc. International Symposium on High-Performance Computer Architecture, 2006, pp. 5-16, Austin, TX.
B. Zhang, A. Arapostathis, S. Nassif and M. Orshansky, “Analytical modeling of SRAM dynamic stability,” in Proc. International Conference on Computer Aided Design, 2006, pp. 315 – 322, San Jose, CA.
K. Constantinides, S. Plaza, J. Blome, V. Bertacco, S. Mahlke, T. Austin, B. Zhang, and M. Orshansky, “Architecting a reliable CMP switch architecture,” in ACM Transations on Architecture and Code Optimization, Vol. 4, No. 1, March 2007.
B. Zhang and M. Orshansky, “Modeling of NBTI-Induced PMOS Degradation under Arbitrary Dynamic Temperature Variation,” in Proc. International Symposium on Quality Electronic Design, 2008, pp. 774-779, San Jose, CA.
B. Zhang and M. Orshansky, “On-line Circuit Reliability Monitoring,” in Proc. Great Lake Symposium on VLSI, 2009, Boston, MA.