个人简历

2016年美国圣母大学访问教授，2017年日本大阪大学客座教授，IEEE高级会员。于浙江大学竺可桢学院获学士学位，电子科学与技术专业获硕士学位，美国密歇根大学-安娜堡计算机科学与工程专业获得博士学位，在美国英特尔公司工作多年，主要研究领域为集成电路设计和设计自动化，包括3D芯片，深度学习算法及硬件加速，低功耗设计，电源及信号完整性等，具有多年研究和工业界相关经验。曾获得ACM SIGDA技术领袖奖，DAC'16及CSTIC’18最佳论文提名奖，2017年JSPS Invitation Fellowship, 2018年DAC系统设计大赛第二名。 迄今共发表60余篇业内国际知名期刊和会议论文，及一本英文专著章节，包括IEEE TVLSI， IEEE TCAD，IEEE Design & Test，DAC，ICCAD等。

研究领域

低功耗芯片设计　人工智能算法及硬件加速　3D芯片设计及优化　电源及信号完整性""

近期论文

J32 Jianing Deng, Zhiguo Shi, and Cheng Zhuo, “Energy Efficient Real-Time UAV Object Detection on Embedded Platforms,” to appear in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD).\r
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J31 Di Gao, Dayane Reis, Xiaobo Sharon Hu, and Cheng Zhuo, “Eva-CiM: A System-Level Energy Evaluation Framework for Computing-in-Memory Architectures,” to appear in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD).\r
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J30 Cheng Zhuo, Shaoheng Luo, Houle Gan, Jiang Hu, and Zhiguo Shi, “Noise-Aware DVFS for Efficient Transitions on Battery-Powered IoT Devices,” to appear in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2019.\r
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J29 Umamaheswara Tida, Cheng Zhuo, Leibo Liu, and Yiyu Shi, “Dynamic Frequency Scaling Aware Opportunistic Through-Silicon-Via Inductor Utilization in Resonant Clocking,” to appear in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2019.\r
J28 Shunjie Dong, Weiqing Ji, Hailong Yao, and Cheng Zhuo, “Early-stage microfluidic network design framework using graph sparsificiation based optimisation,” Electronics Letters, Vol. 55, Issue 19, pp. 1034-1037, 2019.\r
J27 Jun Chen, Hajime Kando, Toshiki Kanamoto, Cheng Zhuo, and Masanori Hashimoto, “A Multi-Core Chip Load Model for PDN Analysis Considering Voltage-Current-Timing Interdependency and Operation Mode Transitions,” IEEE Transactions on Components, Packaging, and Manufacturing Technology, Vol. 9, Issue 9, pp. 1669-1679, 2019.\r
J26 Umamaheswara Tida, Cheng Zhuo, and Yiyu Shi, “Single-Inductor-Multiple-Tier-Regulation: TSV-Inductor Based On-Chip Buck Converters for 3D-IC Power Delivery,” IEEE Transactions on Very Large Scale Integration Systems (TVLSI), Vol. 27, Issue10, pp. 2305-2316, 2019.\r
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J2 Yaguang Li, Cheng Zhuo, and Pingqiang Zhou, “A Cross-Layer Framework of Temporal Power and Supply Noise Prediction,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol. 38, Issue 10, pp. 1914-1927, 2019.\r
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J24 Cheng Zhuo, Kassan Unda, Yiyu Shi, and Wei-Kai Shih, “From Layout to System: Early Stage Power Delivery and Architecture Co-Exploration,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol. 38, Issue 7, pp. 1291-1304, 2019.\r
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J23 Dawei Li, Xiaowei Xu, Weibo Liu, Li Zhang, Cheng Zhuo, and Yiyu Shi, “Optimal Design of a Low-Power, Phase-Switching Modulator for Implantable Medical Applications,” ELSEVIER Integration, the VLSI Journal, Vol. 69, pp. 289-300, 2019.\r
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J22 Leilei Wang, Cheng Zhuo, and Pingqiang Zhou, “Run-time Demand Estimation and Modulation of On-Chip Decaps at System Level for Leakage Power Reduction in Multicore Chips,' ELSEVIER Integration, the VLSI Journal, Vol. 65, pp. 322-330, 2019.\r
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J21 Cheng Zhuo and Baixin Chen, “System-Level Design Consideration and Optimization of Through-Silicon-Via Inductor,” ELSEVIER Integration, the VLSI Journal, Vol. 65, pp. 362-369, 2019.\r
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J20 Baixin, Cheng Zhuo, and Yiyu Shi, “A Physics-Aware Methodology for Equivalent Circuit Model Extraction of TSV-Inductor,” ELSEVIER Integration, the VLSI Journal, Vol. 63, pp. 160-166, 2018.\r
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J19 Zhongyang Liu, Shaoheng Luo, Xiaowei Xu, Yiyu Shi, and Cheng Zhuo, “A Multi-Level Optimization Framework for FPGA-Based Cellular Neural Network Implementation,” ACM Journal on Emerging Technologies in Computing Systems (JETCS), Vol. 14, Issue 4, pp. 47:1-47:17, Dec. 2018.\r
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J18 Xiaowei Xu, Qing Lu, Tianchen Wang, Yu Hu, Cheng Zhuo, Jinglan Liu, Yiyu Shi, “Efficient Hardware Implementation of Cellular Neural Networks with Incremental Quantization and Early Exit,” ACM Journal on Emerging Technologies in Computing Systems (JETCS), Vol. 14, Issue 4, pp. 48:1-48:20, Dec. 2018.\r
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J17 Wenjian Yu, Zhezhao Xu, Bo Li, and Cheng Zhuo, “Floating Random Walk Based Capacitance Simulation Considering General Floating Metals,' IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol. 37, Issue 8, pp. 1711-1715, Aug. 2018.\r
J16 Zhongyang Liu, Cheng Zhuo, and Xiaowei Xu, “An Efficient Segmentation Method Using Quantized and Non-linear CeNN for Breast Tumor Classification,” IET Electronic Letters (EL), Vol. 54, Issue 12, pp. 737-738, Jun. 2018.\r
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J15 Yong-Sheng Li, Qiu Min, Yan Li, En-Xiao Liu, Ran Hao, Hong-Sheng Chen, Cheng Zhuo, Wen-Yan Yin, Zhe-Yao Wang, Hui-Chun Yu, and Er-Ping Li, “Electromagnetic Characteristics of Multi-Port TSVs Using L-2L De-embedding Method and Shielding TSVs,” IEEE Transactions on Electromagnetic Compatibility (TEMC), Vol. 51, Issue 5, pp. 1541-1548, 2017.\r
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J14 Po-Yi Wu, Wai-Kei Mak, Ting-Chi Wang, Cheng Zhuo, Kassan Unda, and Yiyu Shi, “A Routing Framework for Technology Migration with Bump Encroachment,” ELSEVIER Integration, the VLSI Journal, Vol. 58, pp. 1-8, Jun. 2017.\r
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J13 Cheng Zhuo, Houle Gan, Wei-Kai Shih, and Alaeddin Aydiner, “A Cross-Layer Approach for Early-Stage Power Grid Design and Optimization,” ACM Journal on Emerging Technologies in Computing Systems (JETCS), Vol. 12, Issue 3, pp. 25:1-25:20, Sept. 2015.\r
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J12 Cheng Zhuo, Gustavo Wilke, Ritochit Chakraborty, Alaeddin Aydiner, Sourav Chakravarty, and Wei-kai Shih, “Silicon Validated Power Delivery Modeling and Analysis on a 32nm DDR I/O Interface,” IEEE Transactions on Very Large Scale Integration Systems (TVLSI), Vol. 23, Issue 9, pp. 1760-1771, Sept. 2015.\r
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J11 Umamaheswara Tida, Rongbo Yang, Cheng Zhuo, and Yiyu Shi, “On the Efficacy of Through-Silicon-Via Inductors,” IEEE Transactions on Very Large Scale Integration Systems (TVLSI), Vol. 23, Issue 7, pp. 1322-1334, Jul. 2015.\r
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J10 Umamaheswara Tida, Cheng Zhuo, Rongbo Yang, and Yiyu Shi, “Novel ThroughSilicon-Via Inductor Based On-chip DC-DC Converter Designs in 3D ICs,” ACM Journal on Emerging Technologies in Computing Systems (JETCS), Vol. 11 Issue 2, pp. 16:1- 16:14, Nov. 2014.\r
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J9 Cheng Zhuo, David Blaauw, and Dennis Sylvester, “A Statistical Framework for PostFabrication Oxide Breakdown Reliability Prediction and Management,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol. 32, No. 4, pp. 630-643, Apr. 2013.\r
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J8 Cheng Zhuo, Kaviraj Chopra, David Blaauw, and Dennis Sylvester, “Process Variation and Temperature-Aware Full Chip Oxide Breakdown Reliability Analysis,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol. 30, No. 9, pp. 1321-1334, Sept. 2011.\r
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J7 Prashant Singh, Cheng Zhuo, Eric Karl, David Blaauw, and Dennis Sylvester, “SensorDriven Reliability and Wearout Management,” IEEE Design & Test of Computers, Vol. 26, No. 6, pp. 40-49, Nov./Dec. 2009.\r
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J6 Huafeng Zhang, Cheng Zhuo, Jinfang Zhou, and Kangsheng Chen, “Modeling and Optimization of Rotary Traveling Wave Oscillator,” Journal of Zhejiang University (Engineering Science), Vol. 43, No. 4, pp. 634-640, Apr. 2009.\r
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J5 Junjun Gu, Cheng Zhuo, Jianghua Qian, Jinfang Zhou, and Kangsheng Chen, “Transient Analysis of Irregular Power Grid by Row-Based Iterative Method,” Journal of Zhejiang University (Engineering Science), Vol. 43, No. 1, pp. 92-98, Jan. 2009.\r
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J4 Yinjun Wang, Cheng Zhuo, Junyong Deng, Jinfang Zhou, and Kangsheng Chen, “InPackage P/G Planes Analysis and Optimization Based on Transmission Matrix Method,” Journal of Zhejiang University Science A, Vol. 9, No. 6, pp. 849-857, Jun. 2008.\r
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J3 Junyong Deng, Jianghua Qian, Cheng Zhuo, Jinfang Zhou, and Kangsheng Chen, “Random-Walk-Based Power Pads Assignment Algorithm,” Journal of Zhejiang University (Engineering Science), Vol. 42, No. 6, pp. 943-948, Jun. 2008.\r
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J2 Cheng Zhuo, Jiang Hu, Min Zhao, and Kangsheng Chen, “Power Grid Analysis and Optimization Using Algebraic Multigrid,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol. 27, No. 4, pp. 738-751, Apr. 2008.\r
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J1 Junyong Deng, Jianghua Qian, Cheng Zhuo, Jinfang Zhou, and Kangsheng Chen, “Improvement of Random Walk Algorithm for Power/Ground Grid Analysis,” Journal of Zhejiang University (Engineering Science), Vol. 41, No. 8, pp. 1324-1328, Aug. 2007.\r
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会议论文\r
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C47 Chuliang Guo, Li Zhang, Xian Zhou, Weikang Qian, and Cheng Zhuo, “A Reconfigurable Approximate Multiplier for Quantized CNN Applications,” to appear in Proc. IEEE/ACM Asia and South Pacfic Design Automation Conference (ASPDAC), 2020.\r
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C46 Mengyuan Li, Xunzhao Yin, Sharon Xiaobo Hu, and Cheng Zhuo, “Nonvolatile and Energy-Efficient FeFET-Based Multiplier for Energy-Harvesting Devices,” to appear in Proc. IEEE/ACM Asia and South Pacfic Design Automation Conference (ASPDAC), 2020.\r
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C45 Zheyu Yan, Yiyu Shi, Wang Liao, Masanori Hashimoto, Xichuan Zhou, and Cheng Zhuo, “When Single Event Upset Meets Deep Neural Networks: Observations, Explorations, and Remedies,” to appear in Proc. IEEE/ACM Asia and South Pacfic Design Automation Conference (ASPDAC), 2020.\r
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C44 Shenghao Liu, Baixin Chen, and Cheng Zhuo, “Revisiting EAVP for Power Delivery Decoupling Optimization,” in Proc. IEEE International Workshop on the Electromagnetic Compatibility of Integrated Circuits (EMC Compo), pp. 129-131, 2019.\r
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C43 Yufei Chen, Qinming Zhang, Tingtao Li, Hao Yu, Mei Tian, and Cheng Zhuo, “ANT-UNet: Accurate and Noise-Tolerant Segmentation for Pathology Image Processing,” in Proc. IEEE Biomedical Circuits and Systems Conference (BioCAS), pp. 1-4, 2019.\r
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C42 Tianhao Shen, Di Gao, Yiyu Shi, and Cheng Zhuo, “Power Delivery Resonant Virus: Concept and Applications,” in Proc. IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), pp. 1-6, 2019.\r
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C41 Xichuan Zhou, Lang Xu, Shujun Liu, Yingcheng Lin, Lei Zhang, and Cheng Zhuo, “An Efficient Compressive Convolutional Network for Unified Object Detection and Image Compression,” in Proc. AAAI Conference on Artificial Intelligence, Vol. 33, pp. 5949-5956, 2019.\r
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C40 Lu Wang, Leilei Wang, Dejia Shang, Cheng Zhuo, and Pingqiang Zhou, “Optimizing the Energy Efficiency of Power Supply in Heterogeneous Multicore Chips with Integrated Switched-Capacitor Converters,” in Proc. IEEE/ACM Design, Automation & Test in Europe Conference & Exhibition (DATE), pp. 836-841, 2019.\r
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C39 Qiu Min, Shi-Yun Zhou, Cheng Zhuo, Jian-Ming Jin, and Er-Ping Li, “Electrical-thermal co-simulation for through silicon via and active tier in 3-D IC,” in Proc. IEEE International Symposium on Electromagnetic Compatibility and IEEE Asia-Pacific Symposium on Electromagnetic Compatibility (EMC/APEMC), pp. 110, 2018.\r
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C38 Baixin Chen, Umamaheswara Tida, Cheng Zhuo, and Yiyu Shi, “Modeling and Optimization of Magnetic Core TSV-Inductor for On-Chip DC-DC Converter,” in Proc. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 1-8, 2018.\r
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C37 Shaoheng Luo, Cheng Zhuo, and Houle Gan, “Noise-Aware DVFS Transition Sequence Optimization for Battery-Powered IoT Devices,” in IEEE/ACM Design Automation Conference (DAC), pp. 1-6, 2018.\r
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C36 Di Gao, Tianhao Shen, and Cheng Zhuo, “A Design Framework for Processing-in-Memory Accelerator,” in Proc. International Workshop on System Level Interconnect Prediction (SLIP), pp. 1-4, 2018.\r
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C35 Di Gao and Cheng Zhuo, “An Accelerator-Aware Microarchitecture Simulator for Design Space Exploration,” in Proc. IEEE China Semiconductor Technology International Conference (CSTIC), pp. 1-4, 2018.\r
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C34 Zhongyang Liu and Cheng Zhuo, “Cellular Neural Network (CeNN) FPGA Implementation Using Multi-Level Optimization,” in Proc. IEEE China Semiconductor Technology International Conference (CSTIC), pp. 1-3, Nominated for Best Student Paper Award of Symposium IX, 2018.\r
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C33 Shaoheng Luo, Baixin Chen, Ke Li, Cheng Zhuo, and Yiyu Shi, “Novel LC Resonant Clocking for 3D IC Using TSV-Inductor and Capacitor,” in Proc. IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS), pp. 1-3, 2017.\r
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C32 Qiu Min, Er-Ping Li, Cheng Zhuo, Yong-Sheng Li, Shi-Yun Zhou, and Jian-Ming Jin, “Electrical-Thermal Co-Analysis of Through Silicon Via with Equivalent Circuit Model,” in Proc. IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS), pp. 1-4, 2017.\r
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C31 Shi-Yun Zhou, Cheng Zhuo, Qiu Min, and Er-Ping Li, “Graphene Based Thermoelectric Energy Harvesting in 3D ICs,” in Proc. IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS), pp. 1-3, 2017.\r
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C30 Zhongyang Liu, Shaoheng Luo, Xiaowei Xu, Yiyu Shi, and Cheng Zhuo, “FPGA Based Cellular Neural Network Optimization: from Design Space to System,” in Proc. ACM Neuromorphic Computing Symposium, pp. 1-6, 2017.\r
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C29 Xiaowei Xu, Qing Lu, Tianchen Wang, Jinglan Liu, Cheng Zhuo, Sharon Hu, and Yiyu Shi, “Edge Segmentation: Empowering Mobile Telemedicine with Compressed Cellular Neural Networks,” in Proc. IEEE/ACM International Conference On Computer-Aided Design (ICCAD), pp. 880-887, 2017.\r
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C28 Cheng Zhuo, Bei Yu, and Di Gao, “Accelerating Chip Design with Machine Learning From Pre-Silicon to Post-Silicon,” in Proc. IEEE International System-on-Chip Conference (SOCC), pp. 227-232, 2017.\r
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C27 Cheng Zhuo and Baixin Chen, “TSV Inductor Optimization and Its Design Implication,” in Proc. IEEE China Semiconductor Technology International Conference (CSTIC), pp. 1-4, 2017.\r
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C26 Kassan Unda, Chung-Han Chou, Shih-Chieh Chang, Cheng Zhuo and Yiyu Shi, “CN-SIM: A Cycle-Accurate Full System Power Delivery Noise Simulator,” in Proc. IEEE/ACM Asia and South Pacfic Design Automation Conference (ASPDAC), pp. 554-559, 2017.\r
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C25 Cheng Zhuo, “A Cross-Layer Framework for Early-Stage Full Chip Oxide Breakdown Reliability Analysis,” in Proc. IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), pp. 1-4, 2016.\r
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C24 Alaeddin Aydiner, Cheng Zhuo, Wei-Kai Shih, Jason Kao, and Raymond Law, “Bursty Jitter in High Speed I/O Due to Power State Transition and Its Impact on Signal Integrity,” in Proc. IEEE International Symposium on Electromagnetic Compatibility (EMC), pp. 491-494, 2016.\r
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C23 Cheng Zhuo, Kassan Unda, and Yiyu Shi, “A Novel Cross-Layer Framework forEarlyStage Power Delivery and Architecture Co-Exploration,” in Proc. IEEE/ACM Design Automation Conference (DAC), Nominated for Best Paper Award, pp. 1-6, 2016.\r
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C22 Hantao Huang, Cheng Zhuo, Fengbo Ren, and Hao Yu, “A Compressive-sensing based Testing Vehicle for 3D TSV Pre-bond and Post-bond Testing Data,” in Proc. ACM International Symposium on Physical Design (ISPD), pp. 19-25, 2016.\r
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C21 Tao Wang, Jinglan Liu, Cheng Zhuo, and Yiyu Shi, “1-Bit Compressed Sensing Based Framework for Built-in Resonance Frequency Prediction Using On-Chip Noise Sensors,” in Proc. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 721-728, 2015.\r
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C20 Umamaheswara Tida, Varun Mittapalli, Cheng Zhuo, and Yiyu Shi, “Opportunistic Through-Silicon-Via Inductor Utilization in Resonant Clock: Concept and Algorithm,” in Proc. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 750-757, 2014.\r
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C19 Xueqian Zhao, Zhuo Feng, and Cheng Zhuo, “An Efficient Spectral Graph SparsificationApproach to Scalable Reduction of Large Flip-Chip Power Grids,” in Proc. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 218-223, 2014.\r
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C18 Sai Dinakarrao, Chenjie Gu, Cheng Zhuo, and Hao Yu, “A Zonotoped Macromodeling for Reachability Verification of Eye-diagram in High-speed I/O Links with Jitter,” in Proc. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 696-701, 2014.\r
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C17 Umamaheswara Tida, Varun Mittapalli, Cheng Zhuo, and Yiyu Shi, “Green On-chip Inductors in Three-Dimensional Integrated Circuits,” in Proc. IEEE Computer Society Annual Symposium on VLSI (ISVLSI), pp. 571-576, 2014.\r
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C16 Cheng Zhuo, Houle Gan, and Wei-kai Shih, “Early-Stage Power Grid Design: Extraction, Modeling and Optimization,” in Proc. IEEE/ACM Design Automation Conference (DAC), pp. 1-6, 2014.\r
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C15 Umamaheswara Tida, Cheng Zhuo, and Yiyu Shi, “Through-Silicon-Via Inductor: Is It Real or Just A Fantasy?,” in Proc. IEEE/ACM Asia and South Pacfic Design Automation Conference (ASPDAC), pp. 837-842, 2014.\r
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C14 Muhammet Mustafa Ozdal, Chirayu Amin, Andrey Ayupov, Steven Burns, Gustavo Wilke, and Cheng Zhuo, “An Improved Benchmark Suite for the ISPD-2013 Discrete Cell Sizing Contest,” in Proc. ACM International Symposium on Physical Design (ISPD), pp. 168-170, 2013.\r
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C13 Cheng Zhuo, Gustavo Wilke, Ritochit Chakraborty, Alaeddin Aydiner, Sourav Chakravarty, and Wei-kai Shih, “A Silicon-Validated Methodology for Power Delivery Modeling and Simulation,” in Proc. IEEE/ACM International Conference on ComputerAided Design (ICCAD), pp. 255-262, 2012.\r
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C12 Muhammet Mustafa Ozdal, Chirayu Amin, Andrey Ayupov, Steven Burns, Gustavo Wilke, and Cheng Zhuo, “The ISPD-2012 Discrete Cell Sizing Contest and Benchmark Suite,” in Proc. ACM International Symposium on Physical Design (ISPD), pp. 161-164, 2012.\r
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C11 Junjun Gu, Gang Qu, Lin Yuan, and Cheng Zhuo, “Improving Dual Vt Technology by Simultaneous Gate Sizing and Mechanical Stress Optimization,” in Proc. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 732-735, 2011.\r
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C10 Cheng Zhuo, Kanak Agarwal, Dennis Sylvester, and David Blaauw, “Active Learning Framework for Post-Silicon Variation Extraction and Test Cost Reduction,” in Proc. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 508- 515, 2010.\r
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C9 Cheng Zhuo, Dennis Sylvester, and David Blaauw, “Process Variation andTemperatureAware Reliability Management,” in Proc. IEEE/ACM Design, Automation and Test in Europe (DATE), pp. 580-585, 2010.\r
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C8 Cheng Zhuo, Yung-Hsu Chang, Dennis Sylvester, and David Blaauw, “Design Time Body Bias Selection for Parametric Yield Improvement,” in Proc. IEEE/ACM Asia and South Pacific Design Automation Conference (ASPDAC), pp. 681-688, 2010.\r
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C7 Cheng Zhuo, David Blaauw, and Dennis Sylvester, “Post-Fabrication MeasurementDrivenOxide Breakdown Reliability Prediction and Management,” in Proc. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 441-448, 2009.\r
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C6 Kaviraj Chopra, Cheng Zhuo, David Blaauw, and Dennis Sylvester, “A Statistical Approach for Full-Chip Gate-Oxide Reliability Analysis,” in Proc. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 698-705, 2008.\r
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C5 Cheng Zhuo, David Blaauw, and Dennis Sylvester, “Variation-Aware Gate Sizing and Clustering for Post-Silicon Optimized Circuits,” in Proc. IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), pp. 105-110, 2008.\r
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C4 Cheng Zhuo, Huafeng Zhang, Rupak Samanta, Jiang Hu, and Kangsheng Chen, “Modeling, Optimization and Control of Rotary Traveling-Wave Oscillator,” in Proc. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), pp. 476- 480, 2007.\r
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C3 Cheng Zhuo, Jiang Hu, Min Zhao and Kangsheng Chen, “Fast Decap Allocation Based on Algebraic Multigrid,” in Proc. IEEE/ACM International Conference on ComputerAided Design (ICCAD), pp. 107-111, 2006.\r
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C2 Cheng Zhuo, Huafeng Zhang, Jinfang Zhou, Shichuan Du, Xin Wu, Wenjie Mao, andKangsheng Chen, “Early-Stage Power Grid Analysis Using a Supernode-like Formulation of Circuit Equations,” in Proc. IEEE International Conference on Solid State and Integrated Circuit Technology (ICSICT), pp. 1432-1434, 2006.\r
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C1 Cheng Zhuo, Jiang Hu, and Kangsheng Chen, “An Improved AMG-based Method for Fast Power Grid Analysis,” in Proc. IEEE/ACM International Symposium on Quality Electronic Design (ISQED), pp. 290-295, 2006.