个人简历

1998年本科毕业于浙江大学光电系，2005年博士毕业于新加坡南洋理工大学电气与电子工程学院。2006年浙江大学超大规模集成电路设计研究所工作至今。其中2008年至2010年作为荷兰TU/Eindhoven的访问学者在Philips总部的研发中心分三阶段从事60GHz频段CMOS射频集成电路研究。2009年欧盟访问学者资助-玛丽居里学者(Marie Curie International Incoming Fellowship)的获得者。2003年至今已在国际学术期刊和会议上共发表或者联合发表了超过70篇学术论文，其中超过50篇期刊文章被SCI收录。担任部分国际学术期刊如IEEE MWCL,IEEE TMTTs, IET Electronics Letters,IET CDS的审稿人，并担任过The International Symposium on Integrated Circuits(ISIC)和IEEE Conference on Electron Devices and Solid-State Circuits国际会议technical-program-committee(TPC)成员。

研究领域

射频集成电路设计""

近期论文

[1] Y. Fang, X. P. Yu, Z. Shi, and K. S. Yeo, “A 2.4 mW 2.5 GHz multi-phase clock generator with duty cycle imbalance correction in 0.13 μm CMOS,” Integration, no. April, pp. 5–10, 2018.\r
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[2] J. Luo, J. He, H. Wang, S. Chang, Q. Huang, and X. P. Yu, “A 28 GHz LNA using defected ground structure for 5G application,” Microwave and Optical Technology Letters, vol. 60, no. 5, pp. 1067–1072, 2018.\r
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[3] Q. L. Qiu, X. P. Yu, W. Q. Sui, and K. S. Yeo, “Design and optimization of the ring oscillator based injection locked frequency dividers,”Microelectronics Journal, vol. 72, no. December 2017, pp. 40–48, Feb. 2018.\r
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[4] X. Song, Z. H. Lu, and X. P. Yu, “An Accurate dB-Linear CMOS VGA Based on Double Duplicate Biasing Technique,” IEEE Solid-State Circuits Letters, vol. 1, no. 4, pp. 98–101, Apr. 2018.\r
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[5] Z. Tang, Y. Fang, X. Yu, Z. Shi, and N. Tan, “Capacitor-reused CMOS temperature sensor with duty-cycle-modulated output and 0.38°C ( 3 σ ) inaccuracy,” Electronics Letters, vol. 54, no. 9, pp. 568–570, 2018.\r
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[6] Tang, N. N. Tan, Z. Shi, and X.-P. Yu, “A 1.2V Self-Referenced Temperature Sensor with a Time-Domain Readout and a Two-Step Improvement on Output Dynamic Range,” IEEE Sensors Journal, vol. 18, no. 5, pp. 1849–1858, Mar. 2018.\r
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[7] Z. Liu, X.-P. Yu, T. Fan, C. Cao, and W.-Q. Sui, “A Bridged Contactless Measurement Technique for LC Tank Based Voltage-Controlled Oscillator,” Journal of Electronic Testing: Theory and Applications (JETTA), vol. 33, no. 2, pp. 261–266, 2017.\r
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[8] Z. H. Lu, X. P. Yu, and K. S. Yeo, “A wideband BiCMOS variable gain amplifier with novel continuous dB-linear gain control and temperature compensation,” Analog Integrated Circuits and Signal Processing, vol. 90, no. 2, pp. 499–506, Feb. 2017.\r
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[9] Q. L. Qiu, X. P. Yu, and W. Q. Sui, “A K-Band Low-Power Phase Shifter Based on Injection Locked Oscillator in 0.13 μm CMOS Technology,” Journal of Infrared, Millimeter, and Terahertz Waves, vol. 38, no. 11, pp. 1368–1386, Nov. 2017.\r
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[10] X. P. Yu, Z. Liu, D. Z. Fan, and K. S. Yeo, “The Investigation and Optimisation of Phase-Induced Amplitude Attenuation in the Injection-Locked Ring Oscillators-Based Receiver,” Circuits, Systems, and Signal Processing, vol. 36, no. 5, pp. 1818–1835, 2017.\r
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[11] X.-P. Yu, L. Zhang, Z. Shi, and E.-P. Li, “Design of the Addressable Test Structure for S-Parameter-Based RF Device Characterization,” IEEE Transactions on Microwave Theory and Techniques, vol. 65, no. 6, pp. 2122–2131, 2017.\r
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[12] L. Zhang, E. P. Li, and X. P. Yu, “Frequency-Response-Oriented Design and Optimization of N+ Diffusion Guard Ring in Lightly Doped CMOS Substrate,” IEEE Transactions on Electromagnetic Compatibility, vol. 59, no. 2, pp. 481–487, 2017.\r
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[13] L. Zhang, E.-P. Li, X.-P. Yu, and R. Hao, “Modeling and Optimization of Substrate Electromagnetic Coupling and Isolation in Modern Lightly Doped CMOS Substrate,” IEEE Transactions on Electromagnetic Compatibility, vol. 59, no. 2, pp. 662–669, 2017.\r
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[14] C. Zhou, Z. Lu, J. Gu, and X. Yu, “A high-efficiency low-voltage class-E PA for IoT applications in sub-1 GHz frequency range,” Journal of Semiconductors, vol. 38, no. 10, 2017.\r
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[15] Y. Fang, Z. Shi, and X.-P. Yu, “2.5 mW 2.73 GHz non-overlapping multi-phase clock generator with duty-cycle correction in 0.13 μm CMOS,” Electronics Letters, vol. 52, no. 14, pp. 1261–1262, 2016.\r
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[16] J.-H. Huang, F.-X. Yu, J. Jin, S.-Y. Xu, and X.-P. Yu, “19.1 GHz 18 mW divide-by-3 heterodyne injection locking frequency divider in 0.18 μm CMOS technology,” Electronics Letters, vol. 52, no. 12, pp. 1076–1078, 2016.\r
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[17] C. L. Jin, X. P. Yu, and W.-Q. Sui, “1–2 GHz 2 mW injection-locked ring oscillator based phase shifter in 0.18 μm CMOS technology,” Electronics Letters, vol. 52, no. 22, pp. 1858–1860, 2016.\r
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[18] X. P. Yu, W. L. Xu, C. Feng, Z. H. Lu, W. M. Lim, and K. S. Yeo, “A 11.2mW 48-62GHz Low Noise Amplifier in 65nm CMOS Technology,” Circuits, Systems, and Signal Processing, vol. 35, no. 5, pp. 1531–1543, 2016.\r
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[19] C. Feng, X. P. Yu, W. M. Lim, and K. S. Yeo, “A 40 GHz 65 nm CMOS phase-locked loop with optimized shunt-peaked buffer,” IEEE Microwave and Wireless Components Letters, vol. 25, no. 1, pp. 34–36, 2015.\r
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[20] Z. H. Lu, X. P. Yu, K. S. Yeo, and W. M. Lim, “A wideband BiCMOS thermal noise canceling low noise amplifier with temperature compensation,” Microwave and Optical Technology Letters, vol. 57, no. 9, pp. 2121–2125, 2015.\r
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[21] X. Song, K.-S. Yeo, X. Yu, and W. M. Lim, “6.2 GHz 0.5 mW two-dimensional oscillator array-based injection-locked frequency divider in 0.18 μm CMOS,” Electronics Letters, vol. 51, no. 1, pp. 62–63, 2015.\r
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[22] X. P. Yu, Y. B. Li, W. M. Lim, and K. S. Yeo, “A 3 mW 54 GHz 0.18 m BiCMOS voltage controlled oscillator with supply injection locking,” Microwave and Optical Technology Letters, vol. 57, no. 8, pp. 1912–1914, 2015.\r
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[23] X. P. Yu, R. Q. Tian, W. L. Xu, and Z. Shi, “A New On-chip Signal Generator for Charge-Based Capacitance Measurement Circuit,” Journal of Electronic Testing: Theory and Applications (JETTA), vol. 31, no. 3, pp. 329–333, 2015.\r
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[24] B. Hu, X. P. Yu, W. M. Lim, and K. S. Yeo, “Analysis and design of ultra-wideband low-noise amplifier with input/output bandwidth optimization and single-ended/differential-input reconfigurability,” IEEE Transactions on Industrial Electronics, vol. 61, no. 10, pp. 5672–5680, 2014.\r
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[25] J. Jin, X. Yu, X. Liu, W. M. Lim, and J. Zhou, “A wideband voltage-controlled oscillator with gain linearized varactor bank,” IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 4, no. 5, pp. 905–910, 2014.\r
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[26] W. L. Xu, X. P. Yu, W. M. Lim, and K. S. Yeo, “Design and Optimization of a Milli-Meter Wave Amplifier Using Nano-Scale CMOS Devices,” Nanoscience and Nanotechnology Letters, vol. 6, no. 9, pp. 805–811, 2014.\r
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[27] C. Feng, X. P. Yu, Z. H. Lu, W. M. Lim, and W. Q. Sui, “V-band injection-locked oscillator with 9 GHz locking range,” Electronics Letters, vol. 49, no. 8, pp. 548–549, 2013.\r
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[28] C. Feng, X. P. Yu, W. M. Lim, and K. S. Yeo, “A compact 2.1-39 GHz self-biased low-noise amplifier in 65 nm CMOS technology,” IEEE Microwave and Wireless Components Letters, vol. 23, no. 12, pp. 662–664, 2013.\r
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[29] C. L. Jin, X. P. Yu, C. Feng, W. M. Lim, Z. H. Lu, and K. S. Yeo, “A 1-mW K-band gate AC-coupled VCO with 0.25 V supply voltage,” Analog Integrated Circuits and Signal Processing, vol. 77, no. 1, pp. 87–91, 2013.\r
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[30] W. M. Lim, C. Feng, J. Gu, W. Sui, and X. Yu, “Compact 50–62 GHz current-reused low-noise amplifier with gate-drain transformer feedback,” Electronics Letters, vol. 49, no. 11, pp. 720–722, 2013.\r
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[31] Z. H. Lu, W. M. Lim, W. Q. Sui, C. Feng, and X. P. Yu, “3–10 GHz self-biased resistive-feedback LNA with inductive source degeneration,” Electronics Letters, vol. 49, no. 6, pp. 387–388, 2013.\r
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[32] Z. H. Lu, K. S. Yeo, X. P. Yu, and W. M. Lim, “0.6mW 6.3 GHz 40nm CMOS divide-by-2/3 prescaler using heterodyne phase-locking technique,” Electronics Letters, vol. 49, no. 7, pp. 471–472, 2013.\r
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[33] Y. Y. Peng, X. P. Yu, J. M. Gu, W. M. Lim, and W. Q. Sui, “An area-efficient CRLH (composite right/left-handed)-TL approach to the design of rotary traveling-wave oscillator,” IEEE Microwave and Wireless Components Letters, vol. 23, no. 10, pp. 560–562, 2013.\r
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[34] X. P. Yu, Z. H. Lu, B. Y. Hu, W. M. Lim, E. T. Duo, and K. S. Yeo, “A 12-mW 40-60-GHz 0.18-um BiCMOS oscillator-less self-demodulator for short-range software-defined transceivers,” IEEE Journal on Emerging and Selected Topics in Circuits and Systems, vol. 3, no. 4, pp. 521–530, 2013.\r
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[35] S. H. Cao, X. P. Yu, Y. Pan, Z. Shi, and C. H. Hu, “Considerations and Optimization of Measurement Accuracy of Capacitance in Nano-Scale CMOS Technology,” Nanoscience and Nanotechnology Letters, vol. 4, no. 9, pp. 924–929, 2012.\r
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[36] Z. H. Lu, X. P. Yu, Y. Liu, J. N. Su, and C. H. Hu, “Design of Nano-Scale Noise Tolerant CMOS Logic Circuits Based on Probabilistic Markov Random Field Approach,” Nanoscience and Nanotechnology Letters, vol. 4, no. 9, pp. 914–918, 2012.\r
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[37] C. Z. Nan et al., “Bandwidth-related optimization in high-speed frequency dividers using SiGe technology,” Journal of Semiconductor Technology and Science, vol. 12, no. 1, pp. 107–116, 2012.\r
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[38] X. P. Yu, Z. H. Lu, W. M. Lim, Y. Liu, and C. H. Hu, “Circuits Design for Contactless Testing of Nano-Scale CMOS Devices and Circuits,” Nanoscience and Nanotechnology Letters, vol. 4, no. 9, pp. 930–935, 2012.