崔小乐
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崔小乐 北京航空航天大学博士,北京大学博士后,长期从事集成电路与系统领域的教学科研工作。已承担国家、省、市及横向科研项目二十余项;在包括IEEE TVLSI、IEEE TIE、IEEE DATE、IEEE ATS等期刊和会议上发表学术论文一百余篇;拥有授权发明专利多项;曾获省部级科技奖励、IEEE学术会议best paper奖励;承担的主要科研项目:1、国家科技重大专项:MCP、nweWLP封装设计优化与系统可靠性分析2、GF973项目:XX三维芯片XXX研究3、973项目:20/14nm集成电路晶圆级三维集成制造的基础研究4、973项目:半导体相变存储器5、国家自然基金重点项目:面向机器人的集成柔性多物理量传感阵列及其信号处理关键技术研究6、国家自然基金项目:面向SoC高温老化测试的靶向化矢量生成与测试调度方法研究7、863项目:面向特定算法的阵列DSP的低功耗关键技术研究8、广东省科技重大专项:集成电路设计EDA技术创新支撑平台9、广东省科技重大专项子课题:SoC芯片测试验证技术、关键设备研发与产业化10、广东省自然科学基金项目:面向SoC芯片WLTBI的测试矢量生成与测试调度方法研究11、广东省自然科学基金项目:3D SRAM的可测性设计研究12、广东省自然科学基金项目:基于博弈论的软件测试过程模型研究13、深圳市学科布局项目:基于忆阻器的逻辑电路设计方法研究14、深圳市重点实验室提升计划项目:基于无线测试访问端口的芯片测试架构研究15、深圳市产学研重大专项项目:面向晶圆表面缺陷的智能AOI系统研究领域
芯片设计(IC Design);硬件安全(Hardware Security);可信计算(Dependable Computing);智能硬件(Intelligent hardware);芯片可测性与可靠性(Testability and Reliability of IC)"近期感兴趣的研究领域包括:芯片设计(IC Design);硬件安全(Hardware Security);可信计算(Dependable Computing);智能硬件(Intelligent hardware);芯片可测性与可靠性等。"近期论文
1. An enhancement of crosstalk avoidance code based on Fibonacci numberal system for through silicon vias, IEEE Transactions on Very Large Scale Integration Systems, vol.25, no.5, 2017, pp:1601-1610.2. High-performance noninvasive side-channel attack resistant ECC coprocessor for GF(2m), IEEE Transactions on Industrial Electronics,vol.64, no.1, 2017, pp:.727-7383. Testing of 1TnR RRAM array with sneak path technique, SCIENCE CHINA, Information Sciences, vol.60, no.2, 2017, pp: 029402(1)-029402(3)4. Design of low power high performance FinFET standard cells, Circuits Systems and Signal Processing , online 15 Sept. 2017, pp:1-185. Improving DFA attacks on AES with unknown and random faults, SCIENCE CHINA, Information Sciences, vol. 60, no.4,2017, pp: 042401(1)-042401(14)6. Low power high performance FinFET standard cells based on mixed back biasing technology, IEICE Transation. on Electronics, vol.E99-C, no.8, 2016, pp.974-9837. A snake addressing scheme for phase change memory testing, SCIENCE CHINA, Information Sciences, vol.60, no.10, 2016,pp: 102401(1)-102401(11)8. Ultralow-power high-speed flip-flop based on Multimode FinFET, SCIENCE CHINA, Information Sciences, vol.59,no.4, 2016,pp: 042404(1)-042404(11)9. Self-heating burn-in pattern generation based on the genetic algorithm incorporated with a BACK-like procedure, IET Computers & Digital Techniques, vol.9, no. 6, 2015, pp: 300-31010. 一种邻近层资源共享的三维堆叠存储器内建自修复策略,计算机学报(Chinese Journal of Computers),vol. 40, no.9, 2017, pp:2030-203911. A Novel Polymorphic Gate Based Circuit Fingerprinting Technique, ACM Great Lakes Symposium on VLSI (GLSVLSI), 201812. Polymorphic gate based IC watermarking techniques, IEEE Asian and South Pacific Design Automation Conference (ASP-DAC), 201813. Data Transfer Performance Analysis and Enhancement of Critical 3D Interconnects in a 3D SiP Based on Communication Channel Modeling Methodology, IEEE Electronic Components and Technology Conference (ECTC), 201714. A heuristic algorithm for automatic generation of March tests, IEEE Asian Test Symposium (ATS), 201715. A UWB Mixer with a Balanced Wide Band Active Balun Using Crossing Centertaped Inductor, IEEE International Symposium on Circuits and Systems (ISCAS), 2013任中国计算机学会容错计算专委会委员;任中国计量测试学会集成电路测试专委会委员;任深圳市微米纳米电子学会委员等职。标签: 信息工程学院 北京大学深圳研究生院
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